Language Breakdown
Lines of code distribution across 5 owned repositories
122K
Total LOC
Verilog
90,892 lines
74.6%
N/A
Python
30,611 lines
25.1%
N/A
Tcl
394 lines
0.3%
N/A
I
I-Shaped Developer
I-shapedSpecialist — deep expertise in Verilog
Verilog
Python
Tcl
Collaboration Network
Global Impact visualization
Repos
9
PRs
0
Growth
+18%
Top Collaborators
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Coding Streak
Contribution activity over the past year
2 days
38
Contributions
24
Commits
4
Pull Requests
Jun
Jul
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Following
72 total
Om
@Omie2806
Aish Dubey
@profitmonk
Adit Deshpande
@adeshpande3
Ken Pettit
@kdp1965
SAYEEKUMAR
@sayeekumar332
Synced via GitHub
Top Repositories
hvgen_digital_control
0
0
Python
queue_1
0
0
Python
lifo_1
0
0
problem1_tpu
TPU
0
0
Verilog
udlbook
Understanding Deep Learning - Simon J.D. Prince
0
0
Jupyter Notebook
DeepLearningOnFpga-202006
Lecture Material on Deep Learning Inference using FPGA
0
0
C
vikas_biradar_RTL
Take-home assessment
0
0
Verilog
verilog-uart
Verilog UART
0
0
Verilog
systemverilog-homework
SystemVerilog language-oriented exercises
0
0
SystemVerilog
Open Source Impact
Contributions to external projects
0 merged PRs
No external contributions found.